65 research outputs found

    Analysis of electron capture at oxide traps by electric field injection

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    Electron injection into oxide traps of metal/high-k oxide/interlayer/silicon structures is investigated by modeling. We demonstrate the influence on flat-band voltage by the sharpness of the interlayer/silicon interface and by the properties of traps in the oxide. Since charge carrier injection in this kind of structures may take place by two different processes simultaneously, excluding one or the other in the interpretation of data may lead to considerable erroneous results in extracted values of capture cross sections

    Rare Earth Silicate Formation: A Route Towards High-k for the 22 nm Node and Beyond, Journal of Telecommunications and Information Technology, 2009, nr 4

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    Over the last decade there has been a significant amount of research dedicated to finding a suitable high-k/metal gate stack to replace conventional SiON/poly-Si electrodes. Materials innovations and dedicated engineering work has enabled the transition from research lab to 300 mm production a reality, thereby making high-k/metal gate technology a pathway for continued transistor scaling. In this paper, we will present current status and trends in rare earthbased materials innovations; in particular Gd-based, for the high-k/metal gate technology in the 22 nm node. Key issues and challenges for the 22 nm node and beyond are also highlighted

    Modelling of Mg doped ZnO TFTs

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    The ever increase in use of ZnO TFTs requires further in depth analysis to obtain the true transport mechanisms. This paper explores the modelling of MgZnO TFTs using a defect state based model based on multiple trapping and release and successfully validates the model with the fitting parameters VFB, To, Nt and σo

    An insight of p-type to n-type conductivity conversion in oxygen ion-implanted ultrananocrystalline diamond films by impedance spectroscopy

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    The impedance spectroscopy measurements were used to investigate the separated contributions of diamond grains and grain boundaries (GBs), giving an insight into p-type to n-type conductivity conversion in O+-implanted ultrananocrystalline diamond (UNCD) films. It is found that both diamond grains and GBs promote the conductivity in O+-implanted UNCD films, in which GBs make at least half contribution. The p-type conductivity in O+-implanted samples is a result of H-terminated diamond grains, while n-type conductive samples are closely correlated with O-terminated O+-implanted diamond grains and GBs in the films. The results also suggest that low resistance of GBs is preferable to obtain high mobility n-type conductive UNCD films

    Band alignments at Ga<sub>2</sub>O<sub>3</sub> heterojunction interfaces with Si and Ge

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    Amorphous Ga2O3 thin films were deposited on p-type (111) and (100) surfaces of silicon and (100) germanium by atomic layer deposition (ALD). X-ray photoelectron spectroscopy (XPS) was used to investigate the band alignments at the interfaces using the Kraut Method. The valence band offsets were determined to be 3.49± 0.08 eV and 3.47± 0.08 eV with Si(111) and Si(100) respectively and 3.51eV± 0.08 eV with Ge(100). Inverse photoemission spectroscopy (IPES) was used to investigate the conduction band of a thick Ga2O3 film and the band gap of the film was determined to be 4.63±0.14 eV. The conduction band offsets were found to be 0.03 eV and 0.05eV with Si(111) and Si(100) respectively, and 0.45eV with Ge(100). The results indicate that the heterojunctions of Ga2O3 with Si(100), Si(111) and Ge(100) are all type I heterojunctions

    Memristive Non-Volatile Memory Based on Graphene Materials

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    Resistive random access memory (RRAM), which is considered as one of the most promising next-generation non-volatile memory (NVM) devices and a representative of memristor technologies, demonstrated great potential in acting as an artificial synapse in the industry of neuromorphic systems and artificial intelligence (AI), due its advantages such as fast operation speed, low power consumption, and high device density. Graphene and related materials (GRMs), especially graphene oxide (GO), acting as active materials for RRAM devices, are considered as a promising alternative to other materials including metal oxides and perovskite materials. Herein, an overview of GRM-based RRAM devices is provided, with discussion about the properties of GRMs, main operation mechanisms for resistive switching (RS) behavior, figure of merit (FoM) summary, and prospect extension of GRM-based RRAM devices. With excellent physical and chemical advantages like intrinsic Young’s modulus (1.0 TPa), good tensile strength (130 GPa), excellent carrier mobility (2.0 × 105 cm2∙V−1∙s−1), and high thermal (5000 Wm−1∙K−1) and superior electrical conductivity (1.0 × 106 S∙m−1), GRMs can act as electrodes and resistive switching media in RRAM devices. In addition, the GRM-based interface between electrode and dielectric can have an effect on atomic diffusion limitation in dielectric and surface effect suppression. Immense amounts of concrete research indicate that GRMs might play a significant role in promoting the large-scale commercialization possibility of RRAM devices

    Review and perspective of high-k dielectrics on silicon, Journal of Telecommunications and Information Technology, 2007, nr 2

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    The paper reviews recent work in the area of high-k dielectrics for application as the gate oxide in advanced MOSFETs. Following a review of relevant dielectric physics, we discuss challenges and issues relating to characterization of the dielectrics, which are compounded by electron trapping phenomena in the microsecond regime. Nearly all practical methods of preparation result in a thin interfacial layer generally of the form SiOx or a mixed oxide between Si and the high-k so that the extraction of the dielectric constant is complicated and values must be qualified by error analysis. The discussion is initially focussed on HfO2 but recognizing the propensity for crystallization of that material at modest temperatures, we discuss and review also, hafnia silicates and aluminates which have the potential for integration into a full CMOS process. The paper is concluded with a perspective on material contenders for the “end of road map” at the 22 nm node
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